1. Field of the Invention
The present invention relates to testing devices and methods of a semiconductor device and, more particularly to a testing device and method for performing a characteristic test of a semiconductor device while taking an electric conduction to the semiconductor device.
2. Description of the Related Art
In recent years, with increase in electric current and power consumption of a semiconductor integrated circuit device (hereinafter, referred to as a semiconductor device) such as an MPU (Micro Processing Unit) for high-end users or a CPU (Central Processing Unit) for personal computers. In an SiP (System in Package) which constitutes a system by accommodating a plurality of semiconductor devices in a single outer package (accommodation container), there is a PoP (Package on Package) which constitutes a single outer package by mounting other semiconductor devices on a back surface of one semiconductor device.
In a semiconductor device having the PoP structure, external connection terminals for electrical connection to external part are provided even in a second semiconductor device mounted on a back surface of a first semiconductor device so as to perform a characteristic test on the second semiconductor device using the external connection terminals together with a characteristic test using external connection terminals on the first semiconductor device.
Additionally, in recent years, there is a demand for further miniaturization of semiconductor devices in order to materialize portable electronic equipments such a portable phone, a digital still camera, a digital video camera, a notebook-type personal computer, a PDA (Personal Digital Assistant) or the like.
For this reason, even in a CSP (chip size package) such as an FBGA (Fine-pitch Ball Grid Array), an FLGA (Fine-pitch Land Grid Array) or a QFN (Quad Flat Non-lead Package), a further miniaturization and reduction in a pitch are progressed.
Since a form of the outer packages of semiconductor devices has been diversifying as mentioned above, there is a need for preparing many kinds of tools in a manufacturing process and a characteristic test process of semiconductor devices.
There is provided a method of performing a measuring test at a predetermined position while sequentially conveying a tray by positioning aligned flat packages to a probe board by a stage mechanism (For example, refer to Patent Document 1).
In this method, an IC test handler is used. The IC test handler comprises: an IC tray having an IC accommodating opening provided with a positioning mechanism; a stage mechanism for performing a motion control of the IC tray with high accuracy; a probe board attached at a predetermined position within a motion control range of the IC accommodating opening by the stage mechanism; and an IC push socket that lifts an IC from underneath the accommodating opening of the tray to cause pins to contact with probe needles.
Moreover, there is suggested a method of performing a measurement test at a predetermined position by temporarily mounting packages on a board (an arranging board such as a tray) onto which flat packages are mountable and sequentially conveying in the same manner as the above-mentioned Patent Document 1 (refer to Patent Document 2).
The board used in this method mainly aims to cause the same board to be used for packages of the same kind of outer configuration. In this method, a test handler of a semiconductor device is used. The test handler comprises: a press up device having a support part for supporting an IC that moves upward and downward; an IC tester provided above the press up device and having contact pieces contactable with IC leads; a board movably provided between the IC tester and the above-mentioned press up device and having an insertion opening into which the above-mentioned support part is insertable and a receiving table that supports an IC package in the insertion opening, a size of a width is the same for the same kinds of IC and also different kinds of IC; a support guide provided with a predetermined width corresponding to the size of the board; and means for conveying the board along the support guide.
In a conventional characteristic test of semiconductor devices, a method like the following A or B is taken as a processing method of electrically connecting a semiconductor device to a characteristic testing board.
A) A method of conveying a semiconductor device to be tested to a position of a contactor mounted on the characteristic testing board in a state where external connection terminals thereof face a lower surface, attaching the semiconductor device in a state where it is positioned to a contactor, and pressing it by a press head.
B) A method of accommodating a semiconductor device in an arranging plate in a state where external connection terminals thereof face upward or arranging the semiconductor device on a stage in a state where it is applied onto a tacking tape, positioning the stage to a contactor by moving the stage in X and Y directions, and thereafter pressing it onto the contactor by lifting the stage.
Here, in the test method of A), it is difficult to perform a temperature control by cooling or heating the press head since the conveyance/press head moves in a wide range. Additionally, it is very difficult to perform a characteristic test on back terminals of a semiconductor device such as the PoP. Further, since there are various kinds of outer package forms of a semiconductor device, it is needed to prepare a contactor having a positioning function corresponding to each individual kind of semiconductor device. Additionally, in the method of B), it is difficult to perform a temperature control and a characteristic test on the back terminals, like the above-mentioned method A), since the back surface of the semiconductor device is covered due to the semiconductor device being fixed to the stage in a state where the semiconductor device is reversed and accommodated in an arranging plate with the external connection terminals facing upward or in a state where it is applied onto a tacking tape.
Especially, with respect to the temperature control, since a temperature characteristic differs from semiconductor devices, a method (refer to Patent Document 3) of detecting a temperature of a part of the stage and performing a temperature control by cooling or heating a whole surface of the stage by feeding back a result of the temperature detection cannot control the semiconductor device at a desired temperature.
A description will be given, with reference to the drawings, of the above-mentioned methods A) and B). FIG. 1 shows a process of a characteristic test according to the above-mentioned method A).
In the method, first, semiconductor devices 2 accommodated in a conveyance tray in an aligned manner are taken out by a suction head 3 (FIG. 1-(A)). Then, the semiconductor devices 2 are conveyed to and placed on a positioning stage 4 (FIG. 1(B)). Then, the semiconductor devices 2 are held by a press head/suction device 5, and are conveyed to a contactor 7 mounted on a test circuit board 6. The semiconductor devices 2 are pressed onto the contactor 7 by the press head/suction device 5 so as to make an electrical contact to perform a characteristic test (FIG. 1-(C)).
Thereafter, the semiconductor devices 2 are taken out of the contactor 7 by the press/suction head 5 and the semiconductor devices are placed on a positioning stage 4. After that, the semiconductor devices 2 are taken out of the positioning stage 4 (FIG. 1-(D)), and are accommodated in a conveyance tray 8 (FIG. 1-(E)).
A description will now be given, with reference to FIG. 2, of a characteristic test according to the above-mentioned method B).
In the test processing method, semiconductor devices 12 accommodated in a conveyance tray 11 serving as an alignment plate with external connection terminals facing upward are fixed on a stage 13 movable in a horizontal direction by suctioning through a suction hole 13a. Then, the semiconductor devices 12 are pressed onto a contactor 15 of a test circuit board 14 located above the semiconductor devices 12 so as to make an electrical connection to perform a test measurement.
It should be noted that instead of the method in which the semiconductor devices 12 are accommodated in the conveyance tray 11 serving as an alignment plate, another method may be used, in which the semiconductor devices 12 are applied onto a UV tape 16 which is applied with a UV curable adhesive 16a on one side thereof and the semiconductor devices 12 are pealed off after curing the UV curable adhesive 16a by UV irradiation. According to this method, the semiconductor devices 12 are conveyed by applying them onto the UV tape 16 and fixing a periphery of the UV tape 16 to a fixing frame 17.
Patent Document 1: Japanese Laid-Open Patent Application No. 1-147382
Patent Document 2: Japanese Laid-Open Patent Application No. 63-114233
Patent Document 3: Japanese Laid-Open Patent Application No. 2003-66109
There are the following problems in the methods disclosed in the above-mentioned Patent Documents 1 and 2.
1) A measurement test by selecting an arbitrary semiconductor device cannot be performed since the tray accommodating the semiconductor devices in an aligned manner is sequentially moved.
2) For the reason mentioned above, a measurement test by simultaneously selecting a plurality of arbitrary semiconductor devices cannot be performed.
3) A temperature control on a top side of a chip mounted inside cannot be performed since the semiconductor device is heated or cooled for the purpose of performing a test of a flat package, which provides a temperature control from a bottom surface of the package.
4) A temperature control of a plurality of semiconductor devices cannot be performed since a measurement test by selecting a plurality of arbitrary semiconductor devices cannot be performed.
On the other hand, in the characteristic test shown in FIG. 1, it is difficult to perform a temperature control such as cooling or heating the semiconductor devices 2 being tested since the press/suction head 5 moves in a wide range. For example, it is difficult to provide to the press/suction head 5 a liquid cooling unit, heat releasing fins and a blower for air cooling or a heater for heating and a temperature sensor.
Additionally, in the characteristic test using the press/suction head 5 moving in a wide range, it is very difficult to perform a characteristic test by making an electrical contact to terminals of a semiconductor device such as the above-mentioned PoP that has external connection terminals on a back surface thereof. For example, it is difficult to provide to the above-mentioned press/suction head 5 contact pieces as a contactor and pats and wiring for electric connection.
Further, when positioning to the contactor 7 by a press/suction head 5, the positioning to a normal position is achieved by being guided by a positioning guide provided to the contactor due to the weight of the semiconductor device itself when the semiconductor device is put inside the contactor 7. In such a case, a positioning member must be prepared in accordance with the outer package configuration of the semiconductor device. In the above-mentioned contactor 7, it is necessary to prepare an exclusive contactor for each different outer dimension or terminal arrangement of the outer package of the semiconductor device.
On the other hand, in the characteristic test method shown in FIG. 2, it is difficult to perform a temperature control such as cooling or heating since the back surface of the semiconductor device 12 is covered by the stage 13. In the above-mentioned conveyance tray 11, conventionally, a liquid cooling unit for cooling and a heater for heating and also a temperature sensor and wiring are provided in the stage 13, which is movable in a horizontal direction. However, it is necessary to transfer a heat to the semiconductor device 12 through the conveyance tray 11, which is placed and fixed to a top surface of the stage 13. That is, a path for transferring heat is an indirect heat conducting path. Thus, a heat resistance of the heat conducting path is large, and it is difficult to perform a temperature control.
Further, in the characteristic test method shown in FIG. 2, it is controlled to fall in a desired temperature range by attaching a temperature sensor at a specific position on the stage 13, where the conveyance tray 11 is placed, so as to perform an operation or stop of a cooling unit and a heater by feeding back a result of detection of the temperature sensor to a temperature controller. Accordingly, when performing a characteristic test of semiconductor devices having different temperature characteristics, a temperature control of specific positions may be performed, but it is difficult to perform a characteristic test while controlling the temperatures of all the semiconductor devices to fall within a desired temperature range.
Moreover, in the characteristic test method shown in FIG. 2, the semiconductor devices 12, which are aligned and accommodated within one section of the conveyance tray 11, are accommodated with a play in a certain range within the one section so as to facilitate accommodation of the semiconductor devices. Thus, it is difficult to perform accurate positioning between the semiconductor devices 12 and the contactor 15. Additionally, it is very difficult to perform a characteristic test by making an electrical contact with external connection terminals of a semiconductor device such as the PoP, which has the external connection terminals on the back surface thereof since the back surface of the semiconductor device 12 is covered by the conveyance tray 11.
Moreover, in the case where the UV tape 16 is used as shown in FIG. 3, since the back surface of the semiconductor device 12 is covered by the UV tape 16 similarly to the case of the above-mentioned conveyance tray 11, it is difficult to perform a temperature control by cooling and heating. Additionally, it is difficult to make an electrical contact to the terminals on the back surface of the semiconductor device 12 from the back side.